Flip-Flop & Latches

Flip- Flop

An electronic circuit with two stable states that can be used to store binary data is known as a flip-flop. The data stored in a flip-flop can be changed by applying varying inputs.

Difference between Flip-Flop and latches

The basic difference between a flip-flop and a latch is a gating or clocking mechanism.

For example, SR latch and SR flip-flops.

In this circuit when S is set as active the output Q would be high and Q’ will be low.  When S is set as low the output Q will be Low and Q’ will be high. This is irrespective of anything else.

 

sr latch
sr latch

On the other hand, a flip-flop is a gated or clocked latch.

SR Flip-Flop

SR flip- flop
SR flip-flop

In this circuit, the output (stored data) is changed only when an active clock signal is given. Otherwise, even if the S or R is active the data will not change.

clocked SR flip flop
clocked SR flip-flop

JK Flip-Flop

The JK Flip Flop is the most widely used flip-flop. It is considered to be a universal flip-flop. The JK Flip Flop name has been kept on the inventor name of the circuit known as Jack Kilby.

The JK flip-flop is an improvement on the SR flip-flop. In JK Flip-Flop when S=1 and R=1, does not give the undefined output.

Circuit Diagram of JK Flip- Flop

JK flip- flop
JK flip-flop

Truth Table of JK Flip-Flop

 

JK Flip-Flop truth table
JK Flip-Flop truth table

Toggle- The condition of a flip-flop circuit in which the internal state of the flip-flop changes from 0 to 1 or from 1 to 0 is known as toggles condition that means the output alternates between HIGH and LOW.

D Flip-Flop

D flip-flop is also known as a “data” or “delay” flipflop. We have seen earlier that in SR flip-flop when both inputs are logic 1, we are unable to get a stable output.

D flip-flop ensures that the S input and the R input are never equal to one at the same time. The D-type flip-flop is constructed from an SR flip-flop with an inverter added between the S and the R inputs to allow for a single D (data) input.

Circuit Diagram of D Flip-Flop

D flip flop
D flip-flop

The truth table of D flip-flop

D flip flop with SR flip-flop
D flip-flop with SR flip-flop

The D flipflop captures the value of the D-input at a definite portion of the clock cycle (the rising edge of the clock). That captured value (the value of D) becomes the Q output.

T Flip-Flop

The T stands for toggle means T flip Flop stands for toggle Flip Flop. As the name suggests T Flip-flop is only used the toggle state property. As we know only JK Flip-Flop has the toggle property. So T flip-flop is constructed with a slight modification in JK flip-flop.

T flip-flop has only one input and two outputs. It has only two states—toggle state and memory state. Since there are only two states, a T flip-flop is a very good option to use in the counter design and in sequential circuits design where switching an operation is required.

Circuit Diagram of T flip-flop

T flip flop using JK
T flip-flop

Truth Table of T flip-flop

T flip flop truth table
T flip-flop truth table

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